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dc.contributor.authorM. N. OSMAN-
dc.contributor.authorS. YAAKOB-
dc.contributor.authorM. R. YAHYA-
dc.contributor.authorZ. AWANG-
dc.contributor.authorA. F. AWANG MAT-
dc.date.accessioned2017-10-04T04:46:13Z-
dc.date.available2017-10-04T04:46:13Z-
dc.date.issued2007-
dc.identifier.urihttp://hdl.handle.net/123456789/7073-
dc.description.abstractA study of tbe effects on power consumption exhibited by multiple-gateq layout pseudomorphic HEMTs device is presented here. This study required that the DC parameter extraction to be carried out on the p-.HEMT device with a specific number of gate layouts. From the 1-V measurement, it was found that the p-HEMT that applied six gated layout can reduce 75% of power consumption as compared to two gated layout in producing the same amoum of161• This result proved that the p-HEMT device with higher number ofgates consumes less power. The consequences of this lead to the reduction of device power consumption without sacrifying the device performance.en_US
dc.language.isoenen_US
dc.publisherJournal of Sustainability Science and Managementen_US
dc.titleTHE EFFECTS OF MULTIPLE-GATED LAYOUT 0 POWER CONSUMPTION OF PSEUDOMORPHIC-REMTSen_US
dc.typeArticleen_US
Appears in Collections:Journal Articles

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